Bộ nghịch lưu chuyển tụ điện 9 bậc

Nội dung text: Bộ nghịch lưu chuyển tụ điện 9 bậc

1. BỘ NGHỊCH LƯU CHUYỂN TỤ ĐIỆN 9 BẬC A NEW SWITCHED-CAPACITOR NINE-LEVEL INVERTER Ngo Bac Bien1, Nguyen Minh Khai1, Ngo Van Thuyen1 1 Trường đại học Sư phạm Kỹ thuật TP.HCM TÓM TẮT Bài báo này đề xuất một cấu hình của bộ nghịch lưu đa bậc chuyển tụ điện. Cấu hình được đưa ra trong bài báo sử dụng các tụ điện để tăng số bậc điện áp ngõ ra và nâng điện áp ngõ ra của mạch. Dựa trên việc chuyển đổi mắc nối tiếp, song song của tụ điện trong mạch thông qua các công tắc chuyển mạch, các tụ điện trong mạch có thể tự cân bằng mà không cần phải sử dụng đến các mạch bổ trợ. Cấu hình này làm giảm số công tắc bán dẫn, nguồn ngõ vào so với các cấu hình nghịch lưu truyền thống, từ đó làm giảm chi phí và kích thước của hệ thống. Bài báo thực hiện mô phỏng trên phần mềm PSIM 9.0 và được làm thực nghiệm tại phòng thực tập điện tử công suất nâng cao D405, Trường Đại học Sư phạm Kỹ thuật TP.HCM với cấu hình nghịch lưu 9 bậc. Từ khóa: Nghịch lưu đa bậc; chuyển tụ điện; phương pháp điều chế độ rộng xung; tăng điện áp; giảm công tắc bán dẫn trong mạch. ABSTRACT This paper proposes a new configuration of the switched-capacitor multilevel inverter (SCMI). The proposed switched-capacitor nine-level inverter configuration uses the capacitors to raise the output voltage level and boost output voltage. Based on switching the capacitors in series and in parallel through the semiconducting switches, the capacitors can be balance without using auxiliary circuit. The proposed topology does not use more power supplies, moreover the proposed inverter of components are used less than the traditional inverter configuration, thereby reducing the cost and size of the system. To verify the circuit operation, PSIM simulation is performed for 9-level configuration. The experimental results are also shown with 9-level inverter configuration. Keywords: Multilevel inverter; switched-capacitor; pulse-width modulation (PWM); boost voltage; reduced switch. 1. INTRODUCTION used. The MI configurations are commonly Multilevel inverters are one of the used as the NPC clamping diode important components in the power configuration [5], flying capacitor [6] – [7], Cascade H-bridge [8] – [11]. However, these electronic field. Today under the development of clean energy sources as solar configurations use a large number of energy, wind power, the MIs are used to components (semiconductor switches, power switch DC power to AC power for supplies, capacitors, and diode), which distribution generation system. Along with increases the cost of the inverter and the the development of technology, the inverters control becomes complicated. are constantly improved in performance and To solve the problems in traditional quality. The multilevel inverter has the inverters, the switched-capacitor has been following advantages as improved output developed. The switched-capacitor waveform quality, lower multilevel inverter (SCMI) uses charging and electronmagnetic-interface (EMI) and lower discharging characteristics of the capacitor to device stress [1] - [4]. reduce the number of the source in the circuit. In the field of motor control, in electric The SCMI can be self-balance by switching generators, electric vehicles or power the capacitors in parallel and in series distribution systems, inverters are widely through the switches. In the parallel mode, the capacitors are charged directly by power
2. supply, while they release store energy the proposed inverter at the positive period. during the series mode. + State 1: At this state, the output This paper presents a new SCMI voltage is VAB = 0 V. The S12, T1 and T3 configuration which combines with the switches are in the ON state,the S11, T2 and H-bridge circuit to create output ladder T4 switches are in the OFF state, the D1 diode voltage waveform in reducing the number of is forward-biased, the D2 diode is switches. The proposed inverter does not use reverse-biased, the C1 capacitor is charged any inductors. This paper verifies the from the input source and VC1 = Vin. operating principle through the simulation + State 2: The S12, T1 and T4 switches result of nine-level configuration by P.SIM are in the ON state, the S , T and T 9.0 software. The study results are also 11 2 3 switches are in the OFF state, the D1 and D2 demonstrated through experiments with diodes are forward-biased, the C capacitor is inverter 9-level. 1 charged from the input source and VC1 = Vin. 2. PROPOSED At this state, the output voltage is VAB = Vin. SWITCHED-CAPACITOR + State 3: The S , S , T and T NINE-LEVEL INVERTER 11 22 1 4 switches are in the ON state, the S12, S21, S23, T2 and T3 switches are in the OFF state, the D1 diode is reverse-biased, the D2 diode is forward-biased, the C1 capacitor is discharge, the C2 capacitor is charged form the input source and the C1 voltage, VC2 = VC1 + Vin = 2Vin. In this state, the output voltage is VAB = Fig 1. The proposed switched-capacitor VC1 + Vin = 2Vin. nine-level inverter. + State 4: The S12, S21, S23, T1 and T4 switches are in the ON state, the S11 and S22, 2.1 Circuit analysis T2 and T3 switches are in the OFF state, the D1 diode is forward-biased, the D2 diode is Fig 1 is a proposed switched - capacitor reverse-biased, the C1 capacitor is charged nine-levels inverter (PSCNI) schematic. The from input source and VC1 = Vin, the C2 proposed SCMI is association of the SCMI capacitor is discharged. In this state, the and H-bridge embrace S11, S12, S21, S22 and output voltage is VAB = VC2 + Vin = 3Vin. S23 are switched-capacitor switches and T1, T2, T3 and T4 is the switches of H-bridge, the + State 5: The S11, S21, S23, T1 and T4 circuit also uses two capacitors are C1, C2, switches are in the ON state, the S12, S22, T2 two diodes are D1, D2 and an input source is and T3 switches are in the OFF state, the D1 Vin. and D2 diodes are reverse-biased, the C1 and C2 capacitors are discharged. In this state, the In the operation circuit, the C1 capacitor output voltage is VAB = VC1 + VC2 + Vin = is charged in parallel connection with the 4Vin. input source through S12, while it is discharged in series connection with the In the negative period, the status of the input source through S11. Also, the C2 switches in the H-bridge circuit is opposite capacitor is charged in parallel connection with the positive period, the T2 and T3 with the C1 capacitor, input source through switches are in the ON state, the T1 and T4 S22 and anti-parallel diode of S23, while it is switches are in the OFF state, the other discharged in series connection with the C1 components the inverter circuit change capacitor and input source through S21, S23. similar to the positive period in each circuit operation state. All state of the switches and 2.2 Operating principle diodes in the proposed topology are shown in Fig. 2 shows the five operating states of Table 1.
3. Fig 2. Operation states of the proposed inverter in positive period: (a) state 1; (b) state 2; (c) state 3; (d) state 4; (e) state 5. maximum and minimum values of the C2 Table 1. The switches and diodes in the capacitor voltage (VC2) are 90 V and 85.8 V, ON state respectively. No The switches and diodes Output Fig 4 shows the output voltage in the ON state voltage waveform with the total harmonic distortion 1 S11, S21, S23, T1, T4. 4Vin is 14 % (Fig 5). 2 S12, S21, S23 T1, T4, D1. 3Vin 3 S11, S22, T1, T4, D2. 2Vin 4 S12, T1, T4, D1, D2. Vin 5 S12, T1, T3, D1 0 6 S12, T2, T3, D1, D2. -Vin 7 S11, S22, T2, T3, D2. -2Vin 8 S12, S21, S23. T2, T3, D1. -3Vin Fig 3. The voltage waveform of the C1 and C2 9 S11, S21, S23, T2, T3. -4Vin capacitors. 3. THE SIMULATION AND EXPERIMENT RESULTS To verify the operation of the proposed switched-capacitor nine-level inverter, the simulations perform by PSIM software and experiments get by Tektronix TDS 2024B. Fig 4. The output voltage waveform of the The physical model was built according to switched-capacitor nine-level inverter. the schematic in Fig. 1 with R = 80 Ω, C1 = C2 = 2200 μF, Vin = 45 V. 3.1 The simulation results Fig 3 shows the voltage waveform of the C1 and C2 capacitors. The maximum and minimum values of the C1 capacitor voltage Fig 5. The total harmonic distortion of the (VC1) are 45 V and 42.8 V, respectively. The output voltage waveform.
4. 3.2 The experiment results Fig 6 shows the voltage waveform of the C1 and C2 capacitors. The maximum and minimum values of the C1 capacitor voltage (VC1) are 44.1 V and 38.8 V, respectively. The maximum and minimum values of the C2 capacitor voltage (VC2) are 86.7 V and 79.8 V, respectively. Fig 7 shows the output voltage waveform with the total harmonic distortion is 9.49 % (Fig 8). Fig 8. The total harmonic distortion of the output voltage waveform. 4. CONCLUSION This paper proposes a new switched-capacitor multilevel inverter. This paper presents the operation principle of the switched-capacitor nine-level inverter. Based on theory, the proposed inverter conduct simulation on the software PSIM 9.0 and the circuit operability is also verified by the fact Fig 6. The voltage waveform of the C and C 1 2 pattern. Overall, the proposed SCMI has the capacitors. number of components reduced compared with conventional inverter thus saving cost and reducing complexity in control. ACKNOWLEDGMENT Sincerely thanks to the Department of Electrical Engineering of Faculty of Electrical and Electronics Engineering at Ho Chi Minh City University of Technology and Education for supporting the D405 Advanced Electronic Laboratory during the study period. Fig 7. The output voltage waveform of the switched-capacitor nine-level inverter. REFERENCES [1] J. Chavarria, D. Biel, F. Guinjoan, C. Meza and J. J. Negroni, Energy balance control of PV cascaded multilevel grid-connected inverters under level-shifted and phase-shifted PWMs, IEEE Trans. Ind. Electron, vol 60, no 1, pp. 98–111, (2013). [2] S. Kouro, M. Malinowski, K. Gopakumar, J. Pou, L. Franquelo, B. Wu, J. Rodriguez, M. Perez and J. Leon, Recent advances and industrial applications of multilevel converters, IEEE Trans. Ind. Electron, vol 57, no 8, pp. 2553–2580, (2010).
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